Programmable resistance network
US4862136A · kind A · utility
Inventor
Key dates
| Filing date | Apr 13, 1983 |
| Grant date | Aug 29, 1989 |
| Priority date | — |
| Expiry date | Apr 13, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01C10/16
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A programmable resistor network and a method for forming and programming same. The network includes a plurality of independent programmable resistor arrays in a standard DIP semiconductor package. Each resistor array includes a plurality of parallel connected resistor elements capable of being selectively deleted from the array of applying a programming flow of electricity across a first and second DIP pin. The flow of electricity is of a value sufficient to progressively fuse successive array resistors. The total array resistance value progressively increases as array resistors are selectively deleted. Typically an increasing flow of electricity is applied across the array terminals until the desired array resistance value is obtained. The arrays may be manufactured in such a way that the incremental value between successive resistive elements causes the total array resistance value to increase in any desired manner, e.g. geometrically, arithmetically, and logarithmically.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.