Timing signal generator
US4864160A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 4, 1987 |
| Grant date | Sep 5, 1989 |
| Priority date | — |
| Expiry date | Sep 4, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31727
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A timing generator for generating timing signals representing the leading and trailing edges of test pulses. In one embodiment of the invention, a period circuit repetitively measures time intervals, or periods, based on signals from a clock circuit, and a marker circuit generates timing signals representing leading edge and trailing edge markers precisely within each period. The period circuit comprises a period-end memory having a plurality of storage locations which are addressed by a modulo(n) counter. To support multiple timing sets, or timing cycles, one or more of the most significant bits of the address field for the period-end memory may be reserved for designating each timing signal. The time interval measured by the period-end memory may be selectively extended by delaying the clocking signal used for incrementing the modulo(n) counter. The marker circuit comprises leading edge and trailing edge marker memories for storing values indicating where in a period a leading edge or a trailing edge marker is generated. The marker circuit further comprises extended cycle leading edge and trailing edge marker memories for storing values indicating where in a later timing cycle a …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.