Method of and a circuit arrangement for processing sampled analogue electrical signals
US4864217A · kind A · utility
10Cited by
6References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 14, 1988 |
| Grant date | Sep 5, 1989 |
| Priority date | — |
| Expiry date | Sep 14, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sampled analog electrical signal in the form of sample currents is processed by combining the input sample current in one sample period with sample currents derived from input sample currents in preceding sample periods. The signal processing is performed by scaling, adding, subtracting and storing sample currents. A circuit arrangement for carrying out the signal processing may be constructed from current mirror circuits and a current memory which is capable of reproducing at its output in one sample period the current applied to its input in a previous sample period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.