Clock signal generator
US4866310A · kind A · utility
15Cited by
3References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 28, 1987 |
| Grant date | Sep 12, 1989 |
| Priority date | — |
| Expiry date | Oct 28, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1506
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The clock signal generator for generating non-overlapping polyphase clock pulses having no overlapping period of time where the clock pulses have a high level at the same time, comprises a clock signal generation control means provided for each of the polyphase clock pulses so that a clock signal on a signal path where the largest delay is caused among at the signal paths of one phase is used to prevent clock signal generation in the other phases.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.