Digital fast recovery timing algorithm
US4866739A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 1988 |
| Grant date | Sep 12, 1989 |
| Priority date | — |
| Expiry date | Feb 22, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/38
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention employs a four sample per baud timing recovery scheme to achieve fast acquistion of initial timing phase uncertainity and reliable fast tracking with low jitter for non-equalized QAM wave forms. The present invention operates for data timing frequency uncertainties up to 0.02 percent in the preferred embodiment. The timing recovery system is implemented with programmable digital signal processor code in connection with a programmable phase baud timer. The baud timer may be implemented in software or hardware. The present scheme is based on a pair of quadrature (T/4 spaced) timing error signals derived by a wave difference method. In the wave difference method, the envelope power of each baud sample is computed by square summing the real and imaginary samples of the received analog signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.