Method of making insulated-gate field effect transistor
US4868137A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 29, 1988 |
| Grant date | Sep 19, 1989 |
| Priority date | — |
| Expiry date | Dec 29, 2008 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/053
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing an insulated-gate field effect transistor is comprised of forming on a semiconductor substrate a gate electrode elecrically insulated from the substrate. A flat insulating film of silicon oxide is formed over the substrate. A pair of openings are formed through the flat insulating film at both sides of the gate electrode such that opposite side thereof are etched and exposed. An oxide film is formed on the exposed side edges of the gate electrode. Impurities are implanted through the pair of openings into the substrate to form source and drain regions. An electroconductive polysilicon film is deposited over the substrate. The deposited polysilicon film is polished to leave a part thereof selectively in the openings to thereby form electrical contacts to the source and drain regions through the openings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.