Bipolar transistor with shallow junctions and capable of high packing density
US4868631A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 1989 |
| Grant date | Sep 19, 1989 |
| Priority date | — |
| Expiry date | Feb 13, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a bipolar transistor in an LSI or VLSI process which includes forming a buried DUF collector of a first conductivity type, growing an epitaxial layer of a first conductivity type over said DUF collector and forming isolation means around a transistor region. The transistor region includes a trench which at least partially encloses the transistor region and extends through the DUF collector. Emitter and base regions of the first and second conductivity types, respectively, are formed in the epitaxial layer. A collector contact region of the first conductivity is formed in the epitaxial layer and extends down to the buried DUF collector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.