Multilevel concurrent communications architecture for multiprocessor computer systems
US4868814A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 1988 |
| Grant date | Sep 19, 1989 |
| Priority date | — |
| Expiry date | Jul 22, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/44
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and apparatus is described for distributing data in a hierarchically connected system (10) comprising a plurality of nodes (12-25) at each of a plurality of hierarchical levels, one or more bidirectional buses (29-30, 31,32) interconnecting mutually exclusive nodes at each hierarchical level, and a sender (49) for receiving and transmitting data located at each node (12-25) for transmitting and receiving data under the Content Induced Transaction Overlap (CITO) protocol and for transmitting and receiving data without regard to the CITO protocol. Each bidirectional bus (27-32) is interconnected through a node to a node on a bidirectional bus at a higher hierarchical level. Several virtual buses may be formed for distribution of the messages over one or more bidirectional buses (27-33) by controlling the senders (90,92,94,96) at each node by a slot controller (88) which activates the senders (90,92,94,96) as a function of time slot. The invention overcomes the problem of distributing data to all nodes (12-25) in a hierarchically connected system as well as to nodes (14-17 ) at a selected hierarchical level or to nodes (18-19) hierarchically connected subordinate to a node (1…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.