Memory emulation method and system for testing and troubleshooting microprocessor-based electronic systems
US4868822A · kind A · utility
39Cited by
7References
30Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 19, 1988 |
| Grant date | Sep 19, 1989 |
| Priority date | — |
| Expiry date | Feb 19, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/261
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for testing and troubleshooting microprocessor-based electronic systems employs memory emulation techniques as well as other techniques to provide complete functionality tests and fault location. Fine-resolution sync pulses may be generated at preselected time positions during a bus cycle of interest to facilitate full troubleshooting fault isolation. Other features include bus testing using memory emulation techniques, using the chip select line of ROMs to encode test results, and techniques that keep a target microprocessor functioning in a system in which the kernel is dead.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.