Dynamic switching circuit for multiple asynchronous clock sources
US4870299A · kind A · utility
15Cited by
3References
10Claims
0Family size
Inventor
Key dates
| Filing date | Mar 28, 1988 |
| Grant date | Sep 26, 1989 |
| Priority date | — |
| Expiry date | Mar 28, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic switching circuit for multiple asynchronous clock sources comprising a pair of flip-flops which are set and reset in such a manner as to provide high frequency and low frequency output clock pulses without a glitch and within a period extending from approximately a few nanoseconds to no greater than a period equal to the sum of the periods of one of said high and low frequency clock pulses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.