FSK demodulation circuit
US4870659A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 1988 |
| Grant date | Sep 26, 1989 |
| Priority date | — |
| Expiry date | Aug 29, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/1525
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An FSK demodulation circuit which receives as input an FSK modulated reception signal, obtains two quadrature pulse trains, i.e., a first pulse train and a second pulse train, from a phase detection circuit, is provided with at least two sampling means which use the edge of one of the pulse trains and sample the logic of the other pulse train, produces two or more sample outputs at different timings, and determines the logic of the reproduced data from a combination of the logics "1" and "0" of the sample outputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.