Integrated Schottky diode and transistor
US4871686A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 28, 1988 |
| Grant date | Oct 3, 1989 |
| Priority date | — |
| Expiry date | Mar 28, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved means and method is described for forming a Schottky diode integrated with transistors and other devices which is particularly useful where both control circuits and a large power device are on the same chip. Nested N-, P-, N- and P+ regions are formed on an N+ semiconductor substrate. A portion of the overlying dielectric is removed adjacent one of the P+ regions over the N- region and a Schottky contact formed to the N- region and an ohmic contact to the adjacent P+ region. N+ and P+ regions are desirably provided where the junctions between the N-/P- regions and the P-/N- regions intersect the surface to provide contact to the N- and P- regions respectively. A P region extends through the upper N- region and has U-shaped arms which partially overlie an annular shaped P+ region and is located between the active region of the PNP transistor and the collector contact to serve as a Kelvin probe. The arrangement is particularly valuable where a vertical PNP device without a buried collector region is required.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.