Memory mapped deflection correction system
US4871948A · kind A · utility
18Cited by
9References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 8, 1988 |
| Grant date | Oct 3, 1989 |
| Priority date | — |
| Expiry date | Nov 8, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/28
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A memory mapped deflection correction system for use in correcting misconvergence in color CRTs. The invention utilizes predetermined convergence values by storing these values in an onboard memory. Apparatus for spatial domain interpolation interpolates the stored values into intermediate convergence correction values. The intermediate values are reconstructed into analog convergence signals using a reconstruction means, including an analog to digital converter and an amplifier inherently including a time domain filter. The amplifier then drives the convergence yoke of the CRT.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.