Programmable interconnect architecture
US4873459A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 1988 |
| Grant date | Oct 10, 1989 |
| Priority date | — |
| Expiry date | May 18, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17796
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A user-programmable interconnect architecture, which may be used for logic arrays for digital and analog system design, is disclosed. In one embodiment, a plurality of logic cells or modules in a matrix are connected by vertical and horizontal wiring channels. The wiring channels may in turn be programmed by the user to interconnect the various logic cells to implement the required logic function. The wiring channels comprise wiring segements connected by normally open programmable elements situated at the intersection of any two segments to be connected. Sensing circuitry and wiring may be included to allow 100% observability of internal circuit nodes, such as module outputs, from an external pad interface. A universal function module may be configured to implement the popular logic functions and has a physical layout which is conducive to custom circuit design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.