Two-dimensional memory unit having a 2d array of individually addressable blocks each having a 2d array of cells
US4875190A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 21, 1987 |
| Grant date | Oct 17, 1989 |
| Priority date | — |
| Expiry date | Dec 21, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A two-dimensional memory unit allowing two-dimensional data to be written and read along different axes. Memory blocks having numerous memory cells arranged along each of the axes, are located at respective memory addresses, and a number of such memory blocks are arranged along the respective axes. All the memory cells of any of the memory blocks are accessed at the same time. The memory cells for actually inputting and outputting data are selected by data input and ouput controls. Data are written or read out of all of the number of memory cells in a two-dimensional small area by one memory access and, therefore, rapidly with no regard to the direction of scanning which occurs along any of the different axes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.