Circuit for sensing FET or IGBT drain current over a wide dynamic range
US4876517A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 17, 1988 |
| Grant date | Oct 24, 1989 |
| Priority date | — |
| Expiry date | Jun 17, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/0092
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A current sensing circuit includes a pair of power devices connected in parallel. The mirror terminal of the first power device is coupled to a small sense resistance, and the mirror terminal of the second power device is connected to a large sense resistance. Each mirror terminal is coupled to its own comparator. Small currents are sensed by the comparator coupled to the mirror terminal of the first power device, and large currents are sensed by the comparator coupled to the mirror terminal of the second power device. If multiple mirror terminals are not available, a large sense resistance may be connected to the mirror terminal of the power device, and a small sense resistance may be selectively connected in parallel with the large resistance to provide low current-sensing capabilities. Accuracy of the device is enhanced by circuitry which minimizes the effect of integrated impedance variation and a variation in the low sense resistances.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.