Data communication apparatus
US4878197A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 1987 |
| Grant date | Oct 31, 1989 |
| Priority date | — |
| Expiry date | Aug 17, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4018
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data communications apparatus transfers data between two channels, the data formats of each being incompatible with the other. Index registers receive index addresses from each channel to access a pointer in a pointer RAM. The pointer addresses a data location in a data RAM to permit data to be stored or read from either channel at the data transfer rate and byte size for that channel. Registers are provided between each RAM and at least one of the channels to concatenate smaller byte words for transfer between the RAMs and the one channel. Counter apparatus drives the pointer RAM to access successive locations in the data RAM, as desired.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.