Patent · US Expired

Switching-relieved low-loss three-level inverter

US4881159A · kind A · utility

26Cited by

4References

14Claims

0Family size

Assignee

Siemens Aktiengesellschaft · DE

Inventors

Joachim Holtz · Wuppertal, DE
Samir Salama · Berlin, DE
Theodor Salzmann · Erlangen, DE

Key dates

Filing date	Dec 21, 1988
Grant date	Nov 14, 1989
Priority date	—
Expiry date	Dec 21, 2008

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02B70/10
WIPO fieldElectrical machinery, apparatus, energy
WIPO sectorElectrical engineering

Abstract

A three-level inverter, in which the upper and lower half of each phase relieves the semiconductor switching elements from excessive values of the rate of rise of the recurring positive forward blocking voltage. This is done with a circuit arrangement in each half has a wiring diode, a switching off relief capacitor, a further wiring diode, a storage capacitor and a discharging resistor serving as the d-c load. Additional energy feedback devices feed back, into the supplying d-c voltage source, energy which is produced in the switching-off process and is temporarily stored in the circuitry.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.