Multi computer fail safe control apparatus
US4882669A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 1987 |
| Grant date | Nov 21, 1989 |
| Priority date | — |
| Expiry date | Dec 9, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0796
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is a control apparatus using a plurality of microcomputers for controlling an apparatus. This control apparatus comprises a first microcomputer for controlling loads and a second microcomputer, wherein the first microcomputer transmits predetermined information to the second mircocomputer and discriminates the reply data which is send therefrom. When they coincide, the first microcomputer executes a predetermined control operation. When the second microcomputer detects an error in the information transmitted from the first microcomputer, the second microcomputer allows the first microcomputer to stop the control of the loads, thereby realizing the safe control of the loads. On the other hand, predetermined priorities may be given to the microcomputers. When the microcomputer having a high priority is reset, all of the lower significant microcomputers are reset, thereby minimizing a damage when abnormality occurs. A main program malfunction of the microcomputer may be detected by a checking means provided in a sub-routine program, thereby enabling the control to be restarted safely.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.