Method of fabricating self aligned semiconductor devices
US4883767A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 1988 |
| Grant date | Nov 28, 1989 |
| Priority date | — |
| Expiry date | Jul 14, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A self aligned method of fabricating a self aligned semiconductor device employs an initial step in which a first window having an inner perimeter and outer perimeter is opened through a first protective layer situated atop a semiconductor substrate, to divide the substrate into three separate zones. The window exposes a first surface portion of the semiconductor substrate and circumferentially defines or encompasses a second central portion of the protective layer as well as a second unexposed surface portion of the substrate. A third surface portion of the substrate lies beyond the outer perimeter of the first window. Precisely aligned substrate regions of the same or different conductivity type can be established by using differentially etchable materials to mask designated surface portions of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.