Method for erasing data in a semiconductor memory device
US4884239A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 1988 |
| Grant date | Nov 28, 1989 |
| Priority date | — |
| Expiry date | Apr 5, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention concerns a method for electrically erasing data stored in a FAMOS-type EPROM. That is, in an Electrically Programmable Read Only Memory of the Metal Oxide Semiconductor type in which a Floating gate is employed as a memory element and in which data-writing is effected by charge injection from a channel Avalanche current, the invention concerns a method for effectively removing such channel-injected charge from a subject written floating gate. The method specifically entails the injection into the written gate of neutralizational opposing-polarity hot carriers from a generated reverse avalanche current between th MOS drain and substrate. The drain avalanche, however, is limited to "non-breakdown" levels by a technique which, in addition to appropriate drain biasing, includes suitable source and control-gate biasing so as to essentially prevent the flow of channel current during erasure. The method is applicable to either n-channel or p-channel devices and does not require the use of a separate select transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.