Voltage clamped differential to single ended converter circuit
US4885484A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 5, 1988 |
| Grant date | Dec 5, 1989 |
| Priority date | — |
| Expiry date | Jul 5, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/24
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A MOS differential to single ended converter circuit is provided for supplying a single ouput signal in response to first and second differentially related current being supplied to first and second junctions thereof. The converter circuit includes first and second MOS transistors each having gate, drain and source electrodes with the gate electrodes being coupled together while the drain and gate electrodes of the first transistor are interconnected. The drain and source electrodes of the pair of transistors are respectively coupled in series with the first and second junctions. First and second bipolar transistors each having first, second and control electrodes are provided for limiting the voltage swing at the drain of the second MOS transistor. The contol and first electrodes of the first bipolar transistor are coupled respectively to the first and second junctions whiled the control and first electrodes of the second bipolar transistor are respectively coupled to the second and first junctions with the second electrodes of the two bipolar transistors being coupled to an additional common terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.