Digital activity loss detector
US4887071A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 18, 1988 |
| Grant date | Dec 12, 1989 |
| Priority date | — |
| Expiry date | Aug 18, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0751
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital activity detection circuit is provided for monitoring digital input signals such as telecommunications DS1 or DS2 signals, and for generating an alarm when a predetermined input signal loss threshold is reached, such that the input signal loss threshold does not vary with temperature, with component value or with power supply variations. Precise resolution and simplified hardware are achieved in a novel arrangement of counters in the signal activity detector to determine the resolution and signal loss threshold of the detector, all in a digital arrangement without the use of analog devices or retriggerable monostable multivibrators, and in an ASIC fabricable integrated circuit technology such as CMOS.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.