Smart memory card architecture and interface

US4888773A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• David L. Arlington · South Burlington, US
• Jacqueline M. Cole · Binghamton, US
• Bruce G. Hazelzet · South Burlington, US
• David J. Krolak · Dodge Center, US
• Hehching Harry Li · Portland, US
• Bharat J. Oza · Endicott, US
• A. Frank Weaver · South Burlington, US

Key dates

• Filing date: Jun 15, 1988
• Grant date: Dec 19, 1989
• Expiry date: Jun 15, 2008

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F11/1056
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A "smart" memory card architecture and interface provides significantly increased performance, in part, by using fast access dynamic random access memory (DRAM) technologies which allows up to 8-byte data transfers from the memory card every 27ns after the initial access. The 27ns transfer rate includes the time required for error correction code (ECC), parity generation, and other reliability functions. Only two complementary metal oxide seminconductor (CMOS) integrated circuit (IC) logic chips or modules provide all the function required. The simplicity and flexibility afforded by the "smart" memory card approach provides a means to allow one card interface to be used with a broad range of hardware technologies and in different systems. The architecture of the memory card provides a full range of direct and partial store operations in a manner transparent to the system.