High capacitance trench capacitor and well extension process
US4889492A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 1986 |
| Grant date | Dec 26, 1989 |
| Priority date | — |
| Expiry date | May 7, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/665
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for fabricating high-capacitance trench capacitors in a lightly doped, shallow well of a semiconductor substrate. The process involves a two-step doped glass deposition/diffusion routine. After trench formation into a shallow, lightly doped well, a first doped glass is deposited inside the trench and the dopant is diffused from the glass through the trench interior surface to form a region or halo of extra doping around and below each trench. A second doped glass deposition and diffusion of an impurity of the opposite conductivity type to a shallow depth on the trench wall surfaces provides a p/n junction with the first diffusion region to increase the capacitance of the subsequent capacitor. In addition, the trench devices are better isolated from each other, the substrate and any adjacent devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.