Burst jammer erasure circuit for spread spectrum receivers
US4890297A · kind A · utility
6Cited by
4References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 19, 1988 |
| Grant date | Dec 26, 1989 |
| Priority date | — |
| Expiry date | Oct 19, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/707
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The present invention provides a novel burst erasing automatic gain control circuit which includes the basic elements of an automatic gain control circuit and further includes in the loop control circuit, slow response wideband filter means, and a hard limiter which limits the AGC'ed output from the amplifier so that the signal reaching the slow response wideband filter means never exceeds a predetermined value which would cause distortion in the feedback loop. The output of the novel automatic gain control circuit is coupled to a despreading circuit which removes substantially all of the remaining burst jamming signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.