Arrangement for compensating errors in a quadrature modulator
US4890301A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 14, 1988 |
| Grant date | Dec 26, 1989 |
| Priority date | — |
| Expiry date | Nov 14, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D7/161
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An arrangement for compensating errors occurent in a quadrature modulator. Two quadrature signals (cos a(t), sin a(t)) in the baseband are generated, each of which signals is delivered to a respective branch in the modulator two high frequency signals (cos wt, sin wt) with a mutual phase difference of 90 degrees are generated and mixed with the quadrature signals (cos a(t), sin a(t)) and an adder (5) produces the sum of the output signals of the mixers (3, 4). Amplitude errors and phase errors are compensated with the aid of a separate compensating network (11, 12, 14, 16, 17, 19, 21) which is incorporated in the low frequency part of the modulator and which includes adjustable signal generator (14, 16). Local oscillator leakage is compensated with the aid of a second compensating network (13, 15, 18, 20) which is also incorporated in the low frequency part of the modulator and which also includes an adjustable signal generator (15, 18). The signals (k4, k5) from the latter generator (15, 18) are subtracted from the signals occuring in the two branches of the modulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.