Method for manufacturing semiconductor integrated circuit device
US4892837A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 2, 1988 |
| Grant date | Jan 9, 1990 |
| Priority date | — |
| Expiry date | Dec 2, 2008 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method of producing a bipolar transistor which enables an external base region, an intrinsic base region and an emitter region to be formed in self-alignment with respect to the base electrode. More specifically, the method comprises the steps of side-etching an insulating film formed underneath the base electrode by a wet etching process to provide an undercut portion, depositing polycrystalline silicon so as to extend into the undercut portion by low pressure CVD to thereby fill the undercut portion with the polycrystalline silicon, and subjecting the polycrystalline silicon to thermal oxidation, thereby simultaneously forming a sidewall spacer whereby the base electrode and the emitter electrode are electrically isolated from each other and an oxide film on the emitter forming region, the oxide film having high selectivity in anisotropic etching with respect to the substrate (silicon).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.