High speed apparatus for a single latch flash analog-to-digital converter
US4897655A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 1988 |
| Grant date | Jan 30, 1990 |
| Priority date | — |
| Expiry date | Mar 10, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
There is disclosed a high-speed decoding apparatus for use in a flash-type analog-to-digital converter. The apparatus disclosed employs an OR gate which follows an AND gate which AND gate is conventionally employed in a comparator associated with such a converter. The OR gate functions to block any dynamic movement of the unknown input voltage from being transferred to the decode lines of the analog-to-digital converter. To further gain speed, autozeroed inverters are coupled to the output of the OR gate to further assure that the decoder lines are rapidly driven to therefore gain an extra advantage in high-speed operation of the converter employing the apparatus as described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.