Circuit to perform a linear transformation on a digital signal
US4899300A · kind A · utility
3Cited by
7References
3Claims
0Family size
Inventors
Key dates
| Filing date | Mar 30, 1989 |
| Grant date | Feb 6, 1990 |
| Priority date | — |
| Expiry date | Mar 30, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/142
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit which performs a linear transformation on a digital signal. A linear transformation is defined by a graph whose nodes represent operations of addition or subtraction and the branches operations of multiplication by a determined coefficient. According to the invention, the circuit comprises a multiplier for each branch, this multiplier being wired according to the value of the determined coefficient of said branch, and an adder for each node, each adder being wired according to the nature of the operation, addition or subtraction, associated with said node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.