Semiconductor memory device having a register
US4899310A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Jun 22, 1988 |
| Grant date | Feb 6, 1990 |
| Priority date | — |
| Expiry date | Jun 22, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device having a register and a memory cell array includes a controlling circuit for disconnecting an input/output circuit from a data bus and turning OFF a transfer gate provided between the register and data bus in a first operation mode and for connecting the input/output circuit to the data bus and turning ON the transfer gate in a second operation mode. In the first operation mode, a data read or write operation is performed between the memory cell array and an external circuit, and alternatively in the second operation mode the data read or write operation is performed between the register and the external circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.