Subranging analog-to-digital converter with digital error correction
US4903023A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 1988 |
| Grant date | Feb 20, 1990 |
| Priority date | — |
| Expiry date | Mar 28, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/167
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter having error correction in the digital stages of the converter. A calibration microprocessor executes a correction value program prior to, or interspaced with, the normal operation of the converter. From either of two calibration programs, appropriate digital correction values are stored into a digital memory. The analog input signal is converted to a digital signal by a main range analog-to-digital converter, with the output of the converter addressing the memory containing the error correction values. The main range digital value is reconverted to an analog signal which is compared to the original input signal to determine the difference therebetween. This analog difference is converted to a digital signal and combined with the main range digital signal and the addressed correction values to produce the digital output signal of the conversion system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.