Substrate bias circuit having substrate bias voltage clamp and operating method therefor
US4904885A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 1988 |
| Grant date | Feb 27, 1990 |
| Priority date | — |
| Expiry date | Jun 6, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/205
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A substrate bias circuit controls application of a conventional substrate charge pump to the substrate of a semiconductor integrated circuit to prevent latching up of parasitic transistors at the time of turn on of power to the integrated circuit. The substrate bias circuit comprises a filed effect transistor having its source and drain electrodes connected between substrate and charge pump. The gate electrode of the transistor is driven through an RC circuit by the power supply to turn on the transistor for a predetermined time period at the time power is initially applied to the integrated circuit. There is no latching up of the parasitic transistors because application of positive bias voltage to the substrate during turn-on is prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.