Output buffer for improving di/dt
US4906866A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 1987 |
| Grant date | Mar 6, 1990 |
| Priority date | — |
| Expiry date | Dec 22, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09448
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit comprises a chip containing electric circuits in a package with leads. The chip receives power via the leads. The leads have inductance so that when there is a change in current flow (di/dt) through a lead there is a voltage which is developed between the end of the lead and the chip which can cause the chip to either malfunction or function poorly. The highest di/dt is generally caused by an output buffer that changes the logic state of its output. The typical output buffer has a pair of driver transistors that provide one of a logic high or logic low. The di/dt generated by these transistors is controlled by controlling the voltage on the gate or base of the transistor which is providing the particular logic state. This control is responsive to the magnitude of the power supply voltage. An impedance which varies in resistance with supply voltage is placed in series between the positive power supply terminal and the gate or base of the output transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.