Display device
US4908613A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 18, 1987 |
| Grant date | Mar 13, 1990 |
| Priority date | — |
| Expiry date | Sep 18, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A liquid crystal display has a matrix of pixels each with a continuously clocked counter used both as the data store and as the mechanism of grey scale generation. The grey level of each pixel is stored as the phase of the counter with respect to a reference count. The data bus, load clock, counter clock and master phase reference are all lines which transport signals common to a large number of pixels. The shift data line is used to propagate a bit which enables the counter load input. Each pixel circuit instructs the adjacent circuit that it is next to be loaded, by use of a clock delay. Thus pixels are loaded in sequence from data on the load bus, that data being between load clock pulses. The bistable circuit element, set from the master timing and reset from the counter, has an output which directly drives a bistable liquid crystal display device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.