Binary tree multiprocessor
US4910669A · kind A · utility
46Cited by
11References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 3, 1987 |
| Grant date | Mar 20, 1990 |
| Priority date | — |
| Expiry date | Apr 3, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8023
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A binary tree multiprocessing array of plural signal processing elements, and having input/output for the array entirely through a root one of the processing elements, includes in each processing element thereof a hardware, pipelined, floating point, multiply/accumulate processing function for cooperating with a procesing element memory and a processing element input/output processing function to perform signal pattern matching of input digital signal sequences provided to and/or through the root processing element with respect to at least one digital signal sequence pattern stored in the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.