Low power digital receiver
US4910752A · kind A · utility
147Cited by
26References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 29, 1988 |
| Grant date | Mar 20, 1990 |
| Priority date | — |
| Expiry date | Feb 29, 2008 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A low power digital receiver (10) is provided that contemporaneously selects the lowest possible sampling signal frequency (34) (from a plurality of available sampling signals), and received signal level (28) to properly digitize (32) and recover a desired signal. Digitization is performed after the first IF using broadband stages (28, 30, and 32) that are temporarily enabled (44) to rapidly digitize the first IF signal. This, together with the low sampling rate, minimizes the power consumption of the receiver (10) thereby permitting portable and mobile digital receiver embodiments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.