Mixer circuit for use in a tuner of a television set or the like
US4912520A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 1988 |
| Grant date | Mar 27, 1990 |
| Priority date | — |
| Expiry date | Jun 7, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03J5/244
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed is a mixer circuit which employs four FET's in a manner so that a source electrode of a first FET and a source electrode of a second FET are connected to a first terminal, a source electrode of a third FET and a source electrode of a fourth FET are connected to a second terminal, a first impedance circuit is connected between the first terminal and the earth, a second impedance circuit is connected between the second terminal and the earth, a first high frequency input terminal is connected through a first switching circuit to a junction between the first impedance circuit and the first terminal, a second high frequency input terminal is connected through a second switching circuit to a junction between the second impedance circuit and the second terminal, a gate electrode of the first FET and a gate electrode of the fourth FET are connected to a third terminal, a gate electrode of the second FET and a gate electrode of the third FET are connected to a fourth terminal, a drain electrode of the first FET and a drain electrode of the third FET are connected to a fifth terminal, a drain electrode of the second FET and a drain electrode of the fourth FET are connected to a si…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.