Semiconductor device and method of manufacturing the same
US4914498A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 8, 1987 |
| Grant date | Apr 3, 1990 |
| Priority date | — |
| Expiry date | Jan 8, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/047
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a semiconductor device having a thin insulating film of 300 .ANG. or less in thickness on which a conductive layer is provided, the conductive layer is connected to the semiconductor substrate at a position outside the active regions. With such a structure, negative charges accumulated on the conductive layer during the reactive ion etching or ion implantation process can be easily discharged to the semiconductor substrate to prevent a dielectric breakdown of the thin insulating film. In the embodiment, the thin insulating film is a dielectric film of a MOS storage capacitor of a one-transistor type memory cell and the conductive layer is the upper electrode of the MOS capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.