Multiplexing arrangement for a digital transmission system
US4914655A · kind A · utility
51Cited by
14References
32Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Jun 20, 1986 |
| Grant date | Apr 3, 1990 |
| Priority date | — |
| Expiry date | Jun 20, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/048
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A multiplexer is arranged for interleaving blocks of bits from tributary lines. Sequences of blocks of digital bit streams are received in frames from each tributary line. Each frame includes tributary line identification information and plural blocks of bits. Each block of digital bits includes plural data bits and a parity bit. The sequence of blocks from one tributary line also includes in a periodic one of the parity bit positions, a bit containing control information. The blocks of digital bit streams are multiplexed into a single multiplexed bit stream.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.