Semiconductor memory device having sense amplifier having improved activation timing thereof and operating method thereof
US4916671A · kind A · utility
69Cited by
1References
9Claims
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Key dates
| Filing date | Feb 22, 1989 |
| Grant date | Apr 10, 1990 |
| Priority date | — |
| Expiry date | Feb 22, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic random access memory comprises memory cells (MA1-Man) and sense amplifies (SA1-SAn) in a memory array region III and memory cells (MB1-MBn) and sense amplifies (SB1-SBn) in a memory array region IV. In reading operation, first, the sense amplifiers in one region comprising a memory cell designated by an address signal are activated and then sense amplifiers in the other region are activated. As a result, since amplifying operation by the sense amplifiers is performed sequentially, a peak value of a current consumed by the amplification can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.