Method and apparatus for linking processors in a hierarchical control system
US4918589A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 1989 |
| Grant date | Apr 17, 1990 |
| Priority date | — |
| Expiry date | Apr 19, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An inter-processor communication module is inserted into a slot of an equipment rack of the type used to connect I/O modules to system processors in a programmable controller. Using two of the inter-processor communication modules in two respective racks, a supervisory processor is connected to two respective local area processors in a distributed control system. The inter-processor communication module has a serial channel controller that connects to the supervisory processor through a serial I/O port and a serial communication channel to communicate blocks of I/O status data. The serial channel controller is coupled to a backplane controller through a common memory and arbitration circuitry to exchange blocks of I/O status data. The backplane controller, which is also a part of the inter-processor communication module, plugs into the backplane of the rack and exchanges blocks of I/O status data with a local area processor. The two controllers also exchange processor status data to coordinate communications which are initiated by the supervisory processor and the local area processor. Methods of transferring I/O status data between the supervisory processor and the local area proc…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.