Method for making high resolution silicon shadow masks
US4919749A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 1989 |
| Grant date | Apr 24, 1990 |
| Priority date | — |
| Expiry date | May 26, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3065
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A high resolution shadow mask with low pattern distortion is formed from a silicon membrane with a pattern of apertures etched through the membrane by reactive ion etching using a silicon dioxide masking layer. To achieve low distortion over a large area membrane, the stress of the membrane and the masking layer is controlled to remain within an optimal range so that the stress relief that occurs when the apertures are formed is kept negligibly small. A silicon membrane with controlled stress is made using a p/n junction electrochemical etch-stop process. After making the membrane, it is then coated with a deposited silicon dioxide layer. The stress of the oxide layer may be adjusted to an optimum value by annealing after deposition. The membrane with the oxide mask layer is next coated with a photoresist layer which is then patterned with the desired shadow mask pattern. Once the photoresist is patterned, the pattern is then transferred into the oxide layer by reactive ion etching. The patterned oxide then serves as the mask for etching apertures through the silicon membrane, also done by reactive ion etching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.