High speed, low noise integrated circuit
US4920283A · kind A · utility
4Cited by
6References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 16, 1988 |
| Grant date | Apr 24, 1990 |
| Priority date | — |
| Expiry date | Nov 16, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/16
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit is described which includes a plurality of output transistors (T1, T2, . . . Tn) for emitting binary signals to associated output terminals (A1, A2, . . . An). The integrated circuit further includes at least one ground terminal (M; M1, M2 . . . Mn). Between the base of each transistor (T1, T2, . . . Tn) and the at least one ground terminal (M; M1, M2, . . . Mn) a current source (R1, D1) controlled by the base voltage is inserted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.