Cache system used in a magnetic disk controller adopting an LRU system
US4920478A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Mar 24, 1989 |
| Grant date | Apr 24, 1990 |
| Priority date | — |
| Expiry date | Mar 24, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/312
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A magnetic disk controller incorporating a cache memory which employs an LRU (Least Recently Used) scheme in a replacement algorithm of cache blocks and comprising a directory memory whose entries have LRU counter fields, a host system issuing a read/write command to which an arbitrary LRU settling value is appended, a directory search circuit, and a microprocessor. The directory search circuit searches the directory memory in response to the read/write command issued from the host system. The microprocessor stores the LRU setting value appended to the read/write command in the LRU counter field of the hit entry of the directory memory or of the entry corresponding to the repalacement target cache block, in response to the search result of the directory search circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.