Emulation with display update trapping
US4920481A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 1987 |
| Grant date | Apr 24, 1990 |
| Priority date | — |
| Expiry date | Dec 8, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/105
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An emulating data processor includes a host system and an emulating processor with outputs to and inputs from the host system. The emulating processor executes sequences of instructions executable by a PC being emulated, but a host processor independently executes sequences of its instructions which are different from PC instructions. Circuitry monitors the emulating processor outputs and provides information to the host system so that it can emulate the environment of the PC CPU, emulating both memory and I/O devices. The memory accesses of the emulating processor are mapped into the host system memory, so that the host processor is protected from defective PC software on the emulating processor. The display updates of the emulating processor are detected and provide information for the host processor in updating a part of its display which provides the information a PC display would provide simultaneously with the display characteristic of the host system. An input/output processor handles I/O operation requests of the emulating processor, using the host system I/O devices to emulate some of the PC I/O devices. The host system emulates the environment of the emulating processor w…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.