Programmable sequence generator
US4922137A · kind A · utility
7Cited by
2References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 6, 1989 |
| Grant date | May 1, 1990 |
| Priority date | — |
| Expiry date | Jun 6, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1772
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable, UV erasable integrated circuit for the generation of various timing sequences. It includes one AND plane, two OR planes, scan path pipeline registers to allow programming and reading, two counters, and a block of high speed logic which runs at an integer multiple of the clock rate of the pipeline registers. The high speed logic also includes a means for smoothly adjusting the positions of various edges of output signals by changing external resistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.