Semiconductor field oxide formation process using a sealing sidewall of consumable nitride
US4923563A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 22, 1989 |
| Grant date | May 8, 1990 |
| Priority date | — |
| Expiry date | May 22, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrataed circuit fabrication process for creating field oxide regions having substantially no bird's beak, a relatively planar concluding surface, substantially no stress induced dislocations at the edges of the active regions, and a substantial absence of notches or grooves at the edges of the active silicon, by a selective combination of material dimensions and process operations. In one form of practicing the invention, the process utilizes a relatively thick pad oxide below the masking nitride layer, and a second, very thin, sidewall masking nitride layer. The thin sidewall masking nitride layer does not utilize an underlying pad oxide layer. Upon oxidation, the thin sidewall nitride is concurrently lifted and converted to oxide, the materials and dimension being selected to ensure that when the field oxide level approaches the level of the thick pad oxide layer stresses at the corners of the active silicon region are relieved through various oxide paths and accentuated oxidation effects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.