FM detector with reduced distortion
US4926132A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 28, 1989 |
| Grant date | May 15, 1990 |
| Priority date | — |
| Expiry date | Aug 28, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D3/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An FM detection circuit utilizes a first multiplier and phase shift circuit to demodulate an FM signal. The output signal also contains harmonic distortion as a result of the demodulation process. A gain control circuit is included to provide a first gain control signal to the first multiplier which adjusts the magnitude of the output signal of the FM detection circuit in such a manner as to substantially eliminate the harmonic distortion. The gain control circuit uses a second multiplier to generate an output signal proportional to the square of the output signal of the phase shift circuit which is then compared to a constant current to produce an error signal proportional to the harmonic distortion. The error signal controls the magnitude of the first gain control signal such that the output signal of the FM detection circuit is proportional to the deviation of the FM signal from its center frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.