Content-addressed memory
US4930104A · kind A · utility
6Cited by
3References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 8, 1989 |
| Grant date | May 29, 1990 |
| Priority date | — |
| Expiry date | May 8, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A content-addressed memory which has a priority ranking circuit and/or a write control circuit provided in an output section thereof, the priority ranking circuit being adapted to be selectively operated so as to selectively output only one hit signal and the write control circuit being adapted to receive a hit signal and allow a corresponding memory cell to be brought into a write enable state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.